The present invention relates to a semiconductor structure and a method of fabricating the same. More particularly, the present invention relates to a body contacted semiconductor-on-insulator (SOI) metal gate-containing transistor that has a reduced parasitic gate capacitance and a method of fabricating the same.
A conventional transistor has a source region and a drain region that are spaced apart by an intervening body region. All of these regions are planar, and the transistor operation is controlled by a gate. The body region is the area from which electron hole pair generation takes place that allows current to be carried between the source region and the drain region underneath a gate. By contacting the body region, a charge may be applied that changes the voltages at which the transistor turns on. This is often referred to as a threshold voltage adjustment because the on voltage of the device is being adjusted with this technique.
Semiconductor-on-insulator (SOI) technology employs a layer of a semiconductor material, typically silicon, overlying an insulation layer on a supporting wafer. Typically, the SOI structure includes a film of crystalline silicon on a buried layer of silicon oxide on a crystalline silicon substrate. SOI technology makes possible certain performance advantages such as, for example, the reduction in parasitic capacitance which is useful in the semiconductor industry.
In a non-SOI transistor, the body is automatically contacted because it forms part of the same semiconductor wafer on which all the devices sit, and is either grounded via contact to the backside of the chip so the bodies of all the devices are grounded, or tied to the power supply via an N-well. In an SOI wafer, however, the body of the transistor is separated from whatever devices may be separately connected to the wafer by the buried insulation layer. SOI technology in which the body is not connected to anything, e.g., a floating body device, may suffer from the problem of hysteresis; the body remains charged and some of the electrical properties from the last time the transistor was used interfere with the subsequent use of the device.
The use of a body contact in SOI technology addresses this problem, and also presents other opportunities. For example, body contacts allow the threshold voltage to be changed so that standby power can be reduced for low-power applications. Body contacts in SOI technology have conventionally be made by creating a T-shaped structure on the diffusion, thereby creating three distinct regions; a source region, a drain region and a body contact region. This approach can lead to decreased performance in that it yields a greatly increased gate capacitance over a conventional semiconductor device, often leading to a very poor performance. Therefore, there exists a need for a body contact in SOI processes that allows precise control of the body potential but that does not lead to the poor performance that comes from high gate capacitance.
One prior art solution to this parasitic capacitance problem of body contacted SOI devices has been to isolate the active and body contact areas of the transistor. Another prior art approach to reduce the parasitic capacitance on the gate of body contacted SOI devices has been the use of a thicker gate oxide under the body region or the implantation of halogen species at the body region.